Paper-Conference

ICP: Exploiting Instruction Correlation for Prefetching Irregular Memory Accesses

Mengming Li, Chenlu Miao, Buqing Xu, Qijun Zhang, Xiangfeng Sun, Ceyu Xu, Yuan Xie, Wenkai Li, Shang Liu, Zhiyao Xie

IMPart: Integration of Memetic Operations into Multi-Level Framework for Large-k-Way Hypergraph Partitioning

Yugao Zhu, Zhicheng Guo, Shang Liu, Mengming Li, Jing Wang, Zhiyao Xie

LEAP: A Self-Supervised Per-Cycle Toggle Propagation Model Supports Fast, Transferable, and Early Analysis of Layout Power

Wenkai Li, Yuchao Wu, Ziyan Guo, Yao Lu, Wenji Fang, Mengming Li, Zhiyao Xie

PF-LLM: Large Language Model Hinted Hardware Prefetching

Best Paper Award

Ceyu Xu, Xiangfeng Sun, Weihang Li, Chen Bai, Bangyan Wang, Mengming Li, Zhiyao Xie, Yuan Xie

ReadyPower: A Reliable, Interpretable, and Handy Architectural Power Model Based on Analytical Framework

Rank Second in the Track

Qijun Zhang, Shang Liu, Yao Lu, Mengming Li, Zhiyao Xie

Reconfigurable Quantum Instruction Set Computers for High Performance Attainable on Hardware

Z. Yang, D. Ding, Q. Ye, C. Huang, J. Chen, Y. Xie

RTL-BenchMT: Dynamic Maintenance of RTL Generation Benchmark Through Agent-Assisted Analysis and Revision

Jing Wang, Shang Liu, Hangan Zhou, Zhiyao Xie

RTL-Sequencer: Towards Scalable RTL Timing Prediction with the Sequence-based Paradigm

Ziyan Guo, Wenji Fang, Wenkai Li, Yuchao Wu, Shang Liu, Zhiyao Xie

ShortCircuit: AlphaZero-Driven Generative Circuit Design

Dimitrios Tsaras, Antoine Frederic Grosnit, Lei Chen, Zhiyao Xie, Haitham Bou Ammar, Mingxuan Yuan

Tackling MoE Communication Bottleneck with Dynamic In-Switch Computing on Multi-GPUs

Qijun Zhang, Chen Zhang, Zhuoshan Zhou, Haibo Wang, Zhe Zhou, Zhipeng Tu, Guangyu Sun, Zhiyao Xie, Yijia Diao, Zhigang Ji, Jingwen Leng, Guanghui He, Minyi Guo