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J. Chen

D2CIM: A 28nm 53.3 TFLOPS/W Decoding Digital CIM Macro for Efficient FlashMLA-based LLM Inference
Reconfigurable Quantum Instruction Set Computers for High Performance Attainable on Hardware
Exploiting the Memory-Compute-Coupling Feature for CIM Accelerator Design Optimization
NVMePass: A Lightweight, High-performance and Scalable NVMe Virtualization Architecture with I/O Queues Passthrough
Phoenix: Pauli-based High-level Optimization Engine for Instruction Execution on NISQ devices
PipeDCIM: 28nm 115.11 TOPS/mm2xTOPS/W@1.24GHz Pipeline Digital CIM Macro with an Auto-Design Tool for Diverse High-Performance AI Scenarios
Qubit Mapping and Routing tailored to Advanced Quantum ISAs: Not as Costly as You Think
ReQISC: A Reconfigurable Quantum Computer Microarchitecture and Compiler Co-Design

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