Article-Journal | HKUST Computer Architecture Grouphttps://computer-arch-dev.hkust.edu.hk/publication-type/article-journal/Article-JournalHugo Blox Builder (https://hugoblox.com)en-usThu, 01 Jan 2026 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/media/icon_hu_7613a4a452ac7087.pngArticle-Journalhttps://computer-arch-dev.hkust.edu.hk/publication-type/article-journal/A Full-Stack Performance Evaluation Infrastructure for 3D-DRAM-based LLM Acceleratorshttps://computer-arch-dev.hkust.edu.hk/publication/arxiv2026-a-full-stack-performance-evaluation-infr/Thu, 01 Jan 2026 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/arxiv2026-a-full-stack-performance-evaluation-infr/A Self-Supervised and Cross-Design Netlist Power Model for Time-Based Layout Power Analysishttps://computer-arch-dev.hkust.edu.hk/publication/tcad2026-a-self-supervised-and-cross-design-netli/Thu, 01 Jan 2026 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/tcad2026-a-self-supervised-and-cross-design-netli/ALOHA: Accelerating Leveled Fully Homomorphic Encryption with Cryptography-Specific Architectureshttps://computer-arch-dev.hkust.edu.hk/publication/acm2026-aloha-accelerating-leveled-fully-homomo/Thu, 01 Jan 2026 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/acm2026-aloha-accelerating-leveled-fully-homomo/Denim: Heterogeneous Compute-in-Memory Accelerator Exploiting Denoising-similarity for Diffusion Modelshttps://computer-arch-dev.hkust.edu.hk/publication/jssc26-denim/Thu, 01 Jan 2026 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/jssc26-denim/ETCIM: Error-Tolerant Digital CIM Processor with Redundancy-Free Hard Error Repair and Run-Time Soft Error Correctionhttps://computer-arch-dev.hkust.edu.hk/publication/jssc26-etcim/Thu, 01 Jan 2026 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/jssc26-etcim/Hardware-Software Co-design for 3D-DRAM-based LLM Serving Acceleratorhttps://computer-arch-dev.hkust.edu.hk/publication/arxiv2026-hardware-software-co-design-for-3d-dram/Thu, 01 Jan 2026 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/arxiv2026-hardware-software-co-design-for-3d-dram/MFSPart: A Generalized Partitioning Framework for Multi-FPGA Systems and Its Ensemble-Based Extensionhttps://computer-arch-dev.hkust.edu.hk/publication/tcad2026-mfspart-a-generalized-partitioning-fram/Thu, 01 Jan 2026 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/tcad2026-mfspart-a-generalized-partitioning-fram/MRCIM: A Many-Core Reconfigurable Computing-in-Memory Processor Combining CPU and Tensor Modes for NN Accelerationhttps://computer-arch-dev.hkust.edu.hk/publication/tcas-i26-mrcim/Thu, 01 Jan 2026 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/tcas-i26-mrcim/The Rise of Tensor Codecshttps://computer-arch-dev.hkust.edu.hk/publication/ieee2026-the-rise-of-tensor-codecs/Thu, 01 Jan 2026 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/ieee2026-the-rise-of-tensor-codecs/VersaQ-3D: A Reconfigurable Accelerator Enabling Feed-Forward and Generalizable 3D Reconstruction via Versatile Quantizationhttps://computer-arch-dev.hkust.edu.hk/publication/arxiv2026-versaq-3d-a-reconfigurable-accelerator/Thu, 01 Jan 2026 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/arxiv2026-versaq-3d-a-reconfigurable-accelerator/An Architecture-Level CPU Modeling Framework for Power and Other Design Qualitieshttps://computer-arch-dev.hkust.edu.hk/publication/tcad2025-an-architecture-level-cpu-modeling-frame/Wed, 01 Jan 2025 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/tcad2025-an-architecture-level-cpu-modeling-frame/CV-CIM: A Hybrid Domain XOR-derived Similarity-aware Computation-in-memory Supporting Cost Volume Constructionhttps://computer-arch-dev.hkust.edu.hk/publication/jssc25-cvcim/Wed, 01 Jan 2025 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/jssc25-cvcim/DRACO: Co-design for DSP-Efficient Rigid Body Dynamics Acceleratorhttps://computer-arch-dev.hkust.edu.hk/publication/arxiv2025-draco-co-design-for-dsp-efficient-rigid/Wed, 01 Jan 2025 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/arxiv2025-draco-co-design-for-dsp-efficient-rigid/Exploiting the Memory-Compute-Coupling Feature for CIM Accelerator Design Optimizationhttps://computer-arch-dev.hkust.edu.hk/publication/tcad25-mcc/Wed, 01 Jan 2025 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/tcad25-mcc/HERO: Hardware-Efficient RL-based Optimization Framework for NeRF Quantizationhttps://computer-arch-dev.hkust.edu.hk/publication/arxiv2025-hero-hardware-efficient-rl-based-optimi/Wed, 01 Jan 2025 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/arxiv2025-hero-hardware-efficient-rl-based-optimi/LithoExp: Explainable Two-stage CNN-based Lithographic Hotspot Detection with Layout Defect Localizationhttps://computer-arch-dev.hkust.edu.hk/publication/todaes2025-lithoexp-explainable-two-stage-cnn-base/Wed, 01 Jan 2025 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/todaes2025-lithoexp-explainable-two-stage-cnn-base/Matrix: Multi-Cipher Structures Dataflow for Parallel and Pipelined TFHE Acceleratorhttps://computer-arch-dev.hkust.edu.hk/publication/acm2025-matrix-multi-cipher-structures-dataflow/Wed, 01 Jan 2025 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/acm2025-matrix-multi-cipher-structures-dataflow/Memtunnel: A CXL-based Rack-Scale Host Memory Pooling Architecture for Cloud Servicehttps://computer-arch-dev.hkust.edu.hk/publication/ieee2025-memtunnel-a-cxl-based-rack-scale-host-m/Wed, 01 Jan 2025 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/ieee2025-memtunnel-a-cxl-based-rack-scale-host-m/Qubit Mapping and Routing tailored to Advanced Quantum ISAs: Not as Costly as You Thinkhttps://computer-arch-dev.hkust.edu.hk/publication/arxiv2025-qubit-mapping-and-routing-tailored-to-ad/Wed, 01 Jan 2025 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/arxiv2025-qubit-mapping-and-routing-tailored-to-ad/ReQISC: A Reconfigurable Quantum Computer Microarchitecture and Compiler Co-Designhttps://computer-arch-dev.hkust.edu.hk/publication/arxiv2025-reqisc-a-reconfigurable-quantum-compute/Wed, 01 Jan 2025 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/arxiv2025-reqisc-a-reconfigurable-quantum-compute/Rethinking Control Flow in Spatial Architectures: Insights into Control Flow Plane Designhttps://computer-arch-dev.hkust.edu.hk/publication/tc25-controlflow/Wed, 01 Jan 2025 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/tc25-controlflow/Robotic Computing System and Embodied AI Evolution: An Algorithm-Hardware Co-Design Perspectivehttps://computer-arch-dev.hkust.edu.hk/publication/jos25/Wed, 01 Jan 2025 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/jos25/RTLCoder: Fully Open-Source and Efficient LLM-Assisted RTL Code Generation Techniquehttps://computer-arch-dev.hkust.edu.hk/publication/tcad2025-rtlcoder-fully-open-source-and-efficien/Wed, 01 Jan 2025 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/tcad2025-rtlcoder-fully-open-source-and-efficien/Scale, Don't Fine-tune: Guiding Multimodal LLMs for Efficient Visual Place Recognition at Test-Timehttps://computer-arch-dev.hkust.edu.hk/publication/ifac-p2025-scale-don-t-fine-tune-guiding-multimod/Wed, 01 Jan 2025 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/ifac-p2025-scale-don-t-fine-tune-guiding-multimod/STEED: Space and Time-efficient Encrypted Database Using FHEhttps://computer-arch-dev.hkust.edu.hk/publication/ieee2025-steed-space-and-time-efficient-encrypte/Wed, 01 Jan 2025 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/ieee2025-steed-space-and-time-efficient-encrypte/Survey on Characterizing and Understanding GNNs from a Computer Architecture Perspectivehttps://computer-arch-dev.hkust.edu.hk/publication/ieee2025-survey-on-characterizing-and-understandi/Wed, 01 Jan 2025 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/ieee2025-survey-on-characterizing-and-understandi/TensorCIM: Digital Computing-In-Memory Tensor Processor with Multi-Chip-Module-based Architecture for Beyond-NN Accelerationhttps://computer-arch-dev.hkust.edu.hk/publication/jssc25-tensorcim/Wed, 01 Jan 2025 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/jssc25-tensorcim/Transferable Pre-Synthesis PPA Estimation for RTL Designs with Data Augmentation Techniqueshttps://computer-arch-dev.hkust.edu.hk/publication/tcad2025-transferable-pre-synthesis-ppa-estimatio/Wed, 01 Jan 2025 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/tcad2025-transferable-pre-synthesis-ppa-estimatio/