Y. Hu | HKUST Computer Architecture Grouphttps://computer-arch-dev.hkust.edu.hk/author/y.-hu/Y. HuHugo Blox Builder (https://hugoblox.com)en-usThu, 01 Jan 2026 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/media/icon_hu_7613a4a452ac7087.pngY. Huhttps://computer-arch-dev.hkust.edu.hk/author/y.-hu/[Forthcoming] Symposium on VLSI Technology and Circuits (VLSI) 2026https://computer-arch-dev.hkust.edu.hk/publication/vlsi26/Thu, 01 Jan 2026 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/vlsi26/A Full-Stack Performance Evaluation Infrastructure for 3D-DRAM-based LLM Acceleratorshttps://computer-arch-dev.hkust.edu.hk/publication/arxiv2026-a-full-stack-performance-evaluation-infr/Thu, 01 Jan 2026 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/arxiv2026-a-full-stack-performance-evaluation-infr/Denim: Heterogeneous Compute-in-Memory Accelerator Exploiting Denoising-similarity for Diffusion Modelshttps://computer-arch-dev.hkust.edu.hk/publication/jssc26-denim/Thu, 01 Jan 2026 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/jssc26-denim/ETCIM: Error-Tolerant Digital CIM Processor with Redundancy-Free Hard Error Repair and Run-Time Soft Error Correctionhttps://computer-arch-dev.hkust.edu.hk/publication/jssc26-etcim/Thu, 01 Jan 2026 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/jssc26-etcim/HR-DCIM: High-Reliability Floating-Point Digital CIM Architecture with Unified Low-Cost Iterative Error Correctionhttps://computer-arch-dev.hkust.edu.hk/publication/hpca26-hrdcim/Thu, 01 Jan 2026 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/hpca26-hrdcim/MRCIM: A Many-Core Reconfigurable Computing-in-Memory Processor Combining CPU and Tensor Modes for NN Accelerationhttps://computer-arch-dev.hkust.edu.hk/publication/tcas-i26-mrcim/Thu, 01 Jan 2026 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/tcas-i26-mrcim/CELLA: A 28nm Compute-Memory Co-Optimized Real-Time Digital CIM-based Edge LLM Accelerator with 1.78ms-response in Prefill and 31.32 Token/s in Decodinghttps://computer-arch-dev.hkust.edu.hk/publication/vlsi25-cella/Wed, 01 Jan 2025 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/vlsi25-cella/CV-CIM: A Hybrid Domain XOR-derived Similarity-aware Computation-in-memory Supporting Cost Volume Constructionhttps://computer-arch-dev.hkust.edu.hk/publication/jssc25-cvcim/Wed, 01 Jan 2025 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/jssc25-cvcim/ER-DCIM: Error-Resilient Digital CIM with Run-Time MAC-Cell Error Correctionhttps://computer-arch-dev.hkust.edu.hk/publication/hpca25-erdcim/Wed, 01 Jan 2025 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/hpca25-erdcim/LLM-CIM: A 28nm 126.7 TOPS/W Input-LUT-based Digital CIM Macro with Reconfigurable Matrix Multiplication and Nonlinear Operation Modes for LLMshttps://computer-arch-dev.hkust.edu.hk/publication/vlsi25-llmcim/Wed, 01 Jan 2025 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/vlsi25-llmcim/Rethinking Control Flow in Spatial Architectures: Insights into Control Flow Plane Designhttps://computer-arch-dev.hkust.edu.hk/publication/tc25-controlflow/Wed, 01 Jan 2025 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/tc25-controlflow/TensorCIM: Digital Computing-In-Memory Tensor Processor with Multi-Chip-Module-based Architecture for Beyond-NN Accelerationhttps://computer-arch-dev.hkust.edu.hk/publication/jssc25-tensorcim/Wed, 01 Jan 2025 00:00:00 +0000https://computer-arch-dev.hkust.edu.hk/publication/jssc25-tensorcim/