<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Wenkai Li | HKUST Computer Architecture Group</title><link>https://computer-arch-dev.hkust.edu.hk/author/wenkai-li/</link><atom:link href="https://computer-arch-dev.hkust.edu.hk/author/wenkai-li/index.xml" rel="self" type="application/rss+xml"/><description>Wenkai Li</description><generator>Hugo Blox Builder (https://hugoblox.com)</generator><language>en-us</language><lastBuildDate>Thu, 01 Jan 2026 00:00:00 +0000</lastBuildDate><image><url>https://computer-arch-dev.hkust.edu.hk/media/icon_hu_7613a4a452ac7087.png</url><title>Wenkai Li</title><link>https://computer-arch-dev.hkust.edu.hk/author/wenkai-li/</link></image><item><title>A Self-Supervised and Cross-Design Netlist Power Model for Time-Based Layout Power Analysis</title><link>https://computer-arch-dev.hkust.edu.hk/publication/tcad2026-a-self-supervised-and-cross-design-netli/</link><pubDate>Thu, 01 Jan 2026 00:00:00 +0000</pubDate><guid>https://computer-arch-dev.hkust.edu.hk/publication/tcad2026-a-self-supervised-and-cross-design-netli/</guid><description/></item><item><title>COOL: A Cooling-Aware Point Transformer Framework for Thermal Prediction in Advanced 3D/3.5D IC Packaging</title><link>https://computer-arch-dev.hkust.edu.hk/publication/dac2026-cool-a-cooling-aware-point-transformer/</link><pubDate>Thu, 01 Jan 2026 00:00:00 +0000</pubDate><guid>https://computer-arch-dev.hkust.edu.hk/publication/dac2026-cool-a-cooling-aware-point-transformer/</guid><description/></item><item><title>ICP: Exploiting Instruction Correlation for Prefetching Irregular Memory Accesses</title><link>https://computer-arch-dev.hkust.edu.hk/publication/isca2026-icp-exploiting-instruction-correlation/</link><pubDate>Thu, 01 Jan 2026 00:00:00 +0000</pubDate><guid>https://computer-arch-dev.hkust.edu.hk/publication/isca2026-icp-exploiting-instruction-correlation/</guid><description/></item><item><title>LEAP: A Self-Supervised Per-Cycle Toggle Propagation Model Supports Fast, Transferable, and Early Analysis of Layout Power</title><link>https://computer-arch-dev.hkust.edu.hk/publication/dac2026-leap-a-self-supervised-per-cycle-toggle/</link><pubDate>Thu, 01 Jan 2026 00:00:00 +0000</pubDate><guid>https://computer-arch-dev.hkust.edu.hk/publication/dac2026-leap-a-self-supervised-per-cycle-toggle/</guid><description/></item><item><title>RTL-Sequencer: Towards Scalable RTL Timing Prediction with the Sequence-based Paradigm</title><link>https://computer-arch-dev.hkust.edu.hk/publication/dac2026-rtl-sequencer-towards-scalable-rtl-timi/</link><pubDate>Thu, 01 Jan 2026 00:00:00 +0000</pubDate><guid>https://computer-arch-dev.hkust.edu.hk/publication/dac2026-rtl-sequencer-towards-scalable-rtl-timi/</guid><description/></item><item><title>ATLAS: A Self-Supervised and Cross-Stage Netlist Power Model for Fine-Grained Time-Based Layout Power Analysis</title><link>https://computer-arch-dev.hkust.edu.hk/publication/dac2025-atlas-a-self-supervised-and-cross-stage/</link><pubDate>Wed, 01 Jan 2025 00:00:00 +0000</pubDate><guid>https://computer-arch-dev.hkust.edu.hk/publication/dac2025-atlas-a-self-supervised-and-cross-stage/</guid><description/></item><item><title>NetTAG: A Multimodal RTL-and-Layout-Aligned Netlist Foundation Model via Text-Attributed Graph</title><link>https://computer-arch-dev.hkust.edu.hk/publication/dac2025-nettag-a-multimodal-rtl-and-layout-alig/</link><pubDate>Wed, 01 Jan 2025 00:00:00 +0000</pubDate><guid>https://computer-arch-dev.hkust.edu.hk/publication/dac2025-nettag-a-multimodal-rtl-and-layout-alig/</guid><description/></item></channel></rss>