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K-T. Cheng

A 14.08-to-135.69Token/s ReRAM-on-Logic Stacked Outlier-Free Large-Language-Model Accelerator with Block-Clustered Weight-Compression and Adaptive Parallel-Speculative-Decoding
D2CIM: A 28nm 53.3 TFLOPS/W Decoding Digital CIM Macro for Efficient FlashMLA-based LLM Inference
A 28nm 0.22uJ/Token Memory-Compute-Intensity-Aware CNN-Transformer Accelerator with Hybrid-Attention-Based Layer-Fusion and Cascaded Pruning for Semantic-Segmentation
CoXplorer: Multi-staged Co-exploration Framework for AI Model Compression and Accelerator Design
Exploiting the Memory-Compute-Coupling Feature for CIM Accelerator Design Optimization
PipeDCIM: 28nm 115.11 TOPS/mm2xTOPS/W@1.24GHz Pipeline Digital CIM Macro with an Auto-Design Tool for Diverse High-Performance AI Scenarios
Robotic Computing System and Embodied AI Evolution: An Algorithm-Hardware Co-Design Perspective

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